Mostly heat. Every gate destroys information, which is kinda the definition of entropy, so it necessarily generates heat. There’s goofy plans for “reversible computing” that swap bits - so true is 10 and false is 01 - and those should only produce heat through the resistance in the wires. (I personally suspect you’d have to shuttle data elsewhere and destroy it anyway. That’d be off-chip, so it could be arbitrarily large, instead of concentrating hundreds of watts in a thumbnail of silicon. But you’d still have a motherboard with a north bridge, a south bridge, and a woodshed.)
The other change that’d make wider lanes less egregious is 3D chip design. We’re pretty far from 2D, already. There’s dozens of layers of stuff going on in any complex microchip. AMD’s even stacking a couple naked dies on top of one another for higher memory bandwidth. But what’d be transformative is the ability to fold any square layout into a cube, with as much fine detail vertically as it has horizontally. 256-bit data paths could be 16 traces wide and tall. Some could have no presence at all, because the destination is simply atop the source, and connected by a bunch of 10nm diagonals.
But aside from the design and manufacturing complexity of that added dimension, current technology would briefly turn that cube into an incandescent lightbulb. The magic smoke would escape with unprecedented efficiency.
> maybe forever, because we have much bigger bottlenecks to worry about.
Well now I’m wondering what bottlenecks you have in mind. What do you believe to be the biggest bottlenecks for PCs in the near future?
We’re getting to the point where we can’t really make transistors much smaller, for one
Mostly heat. Every gate destroys information, which is kinda the definition of entropy, so it necessarily generates heat. There’s goofy plans for “reversible computing” that swap bits - so true is 10 and false is 01 - and those should only produce heat through the resistance in the wires. (I personally suspect you’d have to shuttle data elsewhere and destroy it anyway. That’d be off-chip, so it could be arbitrarily large, instead of concentrating hundreds of watts in a thumbnail of silicon. But you’d still have a motherboard with a north bridge, a south bridge, and a woodshed.)
The other change that’d make wider lanes less egregious is 3D chip design. We’re pretty far from 2D, already. There’s dozens of layers of stuff going on in any complex microchip. AMD’s even stacking a couple naked dies on top of one another for higher memory bandwidth. But what’d be transformative is the ability to fold any square layout into a cube, with as much fine detail vertically as it has horizontally. 256-bit data paths could be 16 traces wide and tall. Some could have no presence at all, because the destination is simply atop the source, and connected by a bunch of 10nm diagonals.
But aside from the design and manufacturing complexity of that added dimension, current technology would briefly turn that cube into an incandescent lightbulb. The magic smoke would escape with unprecedented efficiency.